From 18201db05389dc072416c64ba1c4eb5cf468adf8 Mon Sep 17 00:00:00 2001 From: Bryan English Date: Mon, 9 Feb 2026 09:32:20 -0500 Subject: [PATCH] fix storage builtins --- rel-lang/sorelc/src/riscv_asm_codegen.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/rel-lang/sorelc/src/riscv_asm_codegen.rs b/rel-lang/sorelc/src/riscv_asm_codegen.rs index 5caeffd..c382cdf 100644 --- a/rel-lang/sorelc/src/riscv_asm_codegen.rs +++ b/rel-lang/sorelc/src/riscv_asm_codegen.rs @@ -199,15 +199,15 @@ impl<'a> CodeGen<'a> { }, IR::Store8 => { // ( x addr -- ) self.pop_some_to("t0 t1"); - self.line("sbu t0, 0(t1)"); // store x at addr + self.line("sb t0, 0(t1)"); // store x at addr }, IR::Store16 => { // ( x addr -- ) self.pop_some_to("t0 t1"); - self.line("shu t0, 0(t1)"); // store x at addr + self.line("sh t0, 0(t1)"); // store x at addr }, IR::Store32 => { // ( x addr -- ) self.pop_some_to("t0 t1"); - self.line("shu t0, 0(t1)"); // store x at addr + self.line("sw t0, 0(t1)"); // store x at addr }, IR::Store => { // ( x addr -- ) self.pop_some_to("t0 t1"); -- 2.43.0